12.38
SeriesandParallel
RLC
Circuits
There will be no external resistor in series with the inductor. However, the winding resistance and
core losses of inductor along with other series dissipating mechanisms present in the power electronic
circuitry behind the filter stage will provide damping for the otherwise undamped LC filter circuit. We
look at an example of use of LC circuit as an averaging filter in a DC–DC converter stage.
The power electronics in the converter converts a fixed DC voltage of 24 V into a switched wave
as shown in Fig. 12.10-9 (b).
v
o
(
t
)
v
s
(
t
)
v
s
(
t
)
(a)
(b)
Time (ms)
24 V
0.1
0.2
2
Ω
0.1
Ω
80
µ
H
µ
330 F
–
–
+
+
Fig. 12.10-9
CircuitandinputwaveformforExample:12.10-1
The average value of the input is 12 V and it has a frequency of 10 kHz. The circuit used to extract
the average value from this input and deliver it to a load resistance of 2
W
is shown in Fig. 12.10-9 (a).
Calculate and plot the output voltage under steady state.
[Hint - A symmetric square wave of
±
1 V amplitude and
f Hz frequency can be approximated by
the
truncated series
4
2
1
3
6
1
5
10
1
7
14
p
p
p
p
p
sin
sin
sin
sin
.
ft
ft
ft
ft
+
+
+
]
Solution
When the rectangular waveform is switched on to the filter circuit the system undergoes the usual
transient response and settles down to a steady state in the long run. We look at only the steady-state
output in this example.
The waveform shown in Fig (b). 12.10-9 can be resolved into two components – the first component
is a DC of 12 V (
i.e., the cyclic average value of
v
S
(
t)) and the second component is a symmetric square
wave of
±
12 V amplitude and 10 kHz frequency.
Steady-state responses due to simultaneous application of two sources obey superposition principle.
Therefore,
v
o
(
t) can be found as superposition of DC steady-state response and steady-state response
to square wave input. The DC steady-state response is 12
×
2/2.1
=
11.43 V since inductor is short and
capacitor is open under DC steady state.
The
±
12 V square wave can be approximated by sum of four sinusoids as given in the hint. Therefore,
we have frequency-response problem at hand. We use phasor equivalent circuit for this purpose.
The lowest frequency we are interested in is 10 kHz. The other frequencies of interest are 30 kHz, 50 kHz
and 70 kHz. The resonant frequency,
w
n
, of the circuit is
1
2
1
80 10
330 10
979 5
6
6
p
×
×
×
=
−
−
Hz
Hz
.
.
The phasor impedances at 10 kHz are
j5.026
W
for 80
m
H inductor and –
j0.0482
W
for 330
m
F
capacitor.
∴
=
−
+
+
−
=
∠ −
Gain at 10 kHz
2 // j0.0482
0.1
2 // j0.0482
0.00968
17
j5 026
.
77.5
0
Amplitude
of input at this frequency
=
12
×
4/
p
=
15.28 V
ResonanceinSeries
RLC
Circuit
12.39
\
10 kHz component
in steady-state output
=
15.28
×
0.00968 sin (2
p
×
10
4
t – 177.5
°
) V.
The next input component to be considered is 5.09 sin(6
p
×
10
4
t) V. The gain at 30
kHz is
obtained by noting the inductor impedance as
j5.026
×
3
=
j15.08
W
and the capacitor impedance
as –
j0.0482/3
=
-
j0.016
W
. Compared to the 2
W
in parallel, the impedance of capacitor is so small in
magnitude that the parallel combination is practically
-
j0.016
W
itself. Therefore, the required gain is
−
+
−
≈
−
≈ −
j
j
j
j
j
0 016
0 1
15 08
0 016
0 016
15 064
0 00106
.
.
.
.
.
.
.
.
\
30 kHz component in steady-state output
=
5.09
×
0.00106 sin(2
p
×
10
4
t – 177.5
°
) V.
Similar calculations show that the gain at 50 kHz is –0.0004 and the gain at 70 kHz is
-
0.0002.
Thus, the total steady-state output due the square wave input component is constructed as follows.
=
×
×
−
° −
×
×
−
15 28 0 00968
2
10
177 5
5 09 0 00106
6
10
3
4
4
.
.
sin(
. )
.
.
sin
p
p
t
t
..
.
sin
.
.
sin
06 0 0004
10
10
2 2 0 0002
14
10
4
4
×
×
−
×
×
p
p
t
t
=
×
−
−
×
−
×
−
0 15
2
10
177 5
0 005
6
10
0 001
10
10
4
0
4
4
. sin(
. )
.
sin
.
sin
p
p
p
t
t
t 00 0004
14
10
4
.
sin
p
×
t
All the components, except the first component, are
really negligible and we need not even have calculated
them. We will accept the
first two components and
neglect the last two. Thus, the total steady-state voltage
at
the output
=
11.43
+
0.15 sin(2
p
×
10
4
t –177.5
°
)
+
0.005 sin 6
p
×
10
4
t V. The AC component of output is
plotted in Fig. 12.10-10 and it is clear that it is heavily
dominated by the 10 kHz component.
The peak-to-peak ripple in DC output is 0.3 V and
represents 2.6% of the DC value of 11.43 V.
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