General Specification Electrical Function gmw3110 General Motors Local Area Network Enhanced Diagnostic Test Mode Specification


 Special Considerations for Nodes Operating as an On-board Test Device



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4.3.3 Special Considerations for Nodes Operating as an On-board Test Device. 

Any node on a GMLAN link operating as an on-board test device (using the diagnostic request CANids 
identified in this document) shall adhere to all rules applicable to an off-board tester as defined in section 
4.3.1. In addition, an on-board test device shall take steps to ensure it does not interfere with an off-board 
test device. To accomplish this, the on-board test device shall monitor the data link (all subnets) for any of 
the reserved ranges of diagnostic CANids (this includes the On Board Diagnostic/European On Board 
Diagnostic (OBD/EOBD) CANids on the high speed link) for a period of at least 5.1 s prior to the on-board 
test device transmitting a diagnostic request. If the device detects diagnostic messages on the link, it shall 
wait until there is at least 5.1 s of diagnostic inactivity on the link before transmitting any diagnostic 
request. Once an on-board test device begins a diagnostic session, it shall continue to monitor the bus for 
diagnostic requests made by an off-board tester. If the on-board tester detects a diagnostic request that it 
did not make then it shall wait for a minimum of 5.1 s of diagnostic inactivity before making another 
diagnostic request. If the on-board test device sends a diagnostic request which results in a bus off 
condition then the on-board tester must monitor the bus for no diagnostic communications for a minimum 
of 5.1 s following the recovery from the bus off condition. An on-board tester shall also wait a minimum of 
5.1 s after a programming session has concluded before initiating any diagnostic request. 
Note:
The programming session is concluded with either a P3
C
timeout or a service $20 request at the end of 
utility file part 1. Refer to Section 9 of this specification for more on the programming process. 
Note:
The 5.1 s minimum that an on-board tester must wait is derived from the P2
CT
* value defined in 
paragraph 6.2.2.2 of this specification. 

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