2.32
Basic
Circuit Laws
R
1
R
2
R
3
R
v
1
v
2
v
3
v
v
o
+
+
+
+
+
+
(
k
– 1)
R
0 V
0 A
–
–
–
–
–
–
Fig. 2.7-8
The non-inverting summer amplifier circuit
G v v
G v v
G v v
i e v G
G
G
G v
G v
G v
1
1
2
2
3
3
1
2
3
1 1
2 2
3
0
(
)
(
)
(
)
. ., [
]
−
+
−
+
−
=
+
+
=
+
+
33
1 1
2 2
3 3
1
2
3
∴ =
+
+
+
+
v
G v
G v
G v
G
G
G
Therefore, the output,
v
o
=
+
+
+
+
+
+
+
+
kG
G
G
G
v
kG
G
G
G
v
kG
G
G
G
v
1
1
2
3
1
2
1
2
3
2
3
1
2
3
3
If there are
n inputs
connected at the input, the equation for
v
o
gets generalised to
v
k
G v
o
G
j
i i
i
n
j
n
=
∑
=
=
∑
1
1
V.
If all the input resistors are equal and
k
=
n,
then the circuit performs the addition function without
any gain,
i.e.,
v
v
o
i
i
n
=
=
∑
1
V.
It may be observed that the gain for each source voltage is dependent on the conductance values
of resistors in
all source lines. Hence, addition of an extra source will affect the gain for all other
sources. The inverting summer circuit does not suffer from this shortcoming, thanks to the inverting
input
terminal acting as a summing node for currents.
If one can spend two Opamps, an inverting
summer followed by an inverting amplifier
with a gain of –1 is a better solution than the
non-inverting summer.
the subtractor circuit
The
Subtractor Circuit is shown in Fig. 2.7-9.
The principle of zero input current is used
to arrive at the conclusion that the potential
dividers connected
at both input terminals
are unloaded. Therefore, the potential of
non-inverting
input terminal is kv
1
/(
k
+
1).
+
+
+
v
o
=
k
(
v
1
–
v
2
)
R
R
v
1
v
2
kR
kR
0 V
0 A
–
–
+
+
0 A
–
–
–
Fig. 2.7-9
The subtractor circuit
using a single Opamp
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KVL and KCL in Operational
Amplifier Circuits
2.33
The potential at the inverting input terminal is the same as the potential at non-inverting input
terminal by the principle of virtual short. Therefore, the potential at inverting terminal is
kv
1
/(
k
+
1) V
with respect to ground node.
Now, we write the KCL at inverting input terminal and make use of principle of zero input current
while writing down the equation. The KCL equation is obtained as
G
kv
k
v
G
k
kv
k
v
o
1
2
1
1
1
0
+
−
+
+
−
=
.
Solving for v
o
, we get,
v
o
=
k (
v
1
-
v
2
).
k
=
1, if all resistors chosen are equal.
The circuit is expected to give zero output if
v
1
=
v
2
. That is, its common mode gain is expected to
be zero. However, in practice it isn’t. The reason is the invariably present deviations in the resistance
value of resistors from their nominal values. Resistors have a tolerance factor. If the actual values of
resistance of resistors is such that the ratio between the two resistors connected to inverting terminal
is different from the ratio of resistors connected at the non-inverting terminal, the common mode gain
of the circuit will not be zero. This circuit is also called
differential amplifier. The input resistance
offered to the sources depends on the value of
R used in the circuit. The performance of this circuit in
amplifying voltage difference is satisfactory for less stringent applications.
example: 2.7.1
Find the value of
V in the circuit in if the output is
observed to be 0 V.
Solution
This is a non-inverting amplifier of gain
=
+
=
1
9
10
R
R
. The output voltage will be 10 times the
voltage at non-inverting pin with respect to ground.
If the output is seen to be zero, then the voltage at
non-inverting input must be 0 V.
Input terminals of Opamp do not draw current.
Hence, the 2 mA delivered by the current source will flow through 10 k resistor. Therefore, the voltage
at the non-inverting pin is
V
+
10 k
×
2 mA
=
(
V
+
2) V.
V has to be
-
2 V for this to become 0 V.
example: 2.7.2
Find the output voltage in the Opamp circuit in Fig. 2.7-11.
Solution
Inverting pin is at the same
potential as that of the
non-inverting pin by virtual short principle. Therefore,
inverting pin is at 2 V. Hence, the voltage drop across
1 k resistor is (
v
S
(
t) – 2) V. Therefore, the current that
comes to inverting pin from 1 k resistor line is (
v
S
(
t) – 2)
mA. The current source delivers 4 mA to the same pin.
Inverting pin of Operational Amplifier does not draw any
+
–
v
o
9
R
10
k
R
V
–
+
2mA
–
+
Fig. 2.7-10
Circuit for Example 2.7.1
–
+
+
–
v
o
9
R
1
k
10
k
R
V
s
(
t
)
–
+
–
+
4mA
2V
Fig. 2.7-11
Circuit for
Example 2.7.2
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2.34
Basic Circuit Laws
current. Therefore, the current that goes into 10 k will be [4
+
(
v
S
(
t) – 2)]
=
(
v
S
(
t)
+
2) mA. Therefore,
drop across 10 k will be (10
v
S
(
t)
+
2) V. The inverting pin is at 2 V. Therefore, the output voltage
=
2 V
-
(10
v
S
(
t)
+
2) V
=
-
10
v
S
(
t) V.
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