Theme: Expression of signals by time and degree Plan: The Digital Signal Processing

The Dawn of DSP Processors

Digital signal processing started in the early 1950s out of a different goal; designers of analog systems wished to simulate their designs and investigate their performance before building expensive prototypes. They did this using Digital Computers and this was the beginning of Digital Signal Processing . The majority of the supporting mathematics and algorithms was developed around that time too. Initially, it was sufficient for the simulations to be performed in good time but later some applications required the results in real-time. This ushered in the advent of real-time DSP. At the moment DSP processors are available as single-chip processors. The evolution of the architecture and technology that led to a single-chip processor took separate paths. Early computers had separate memory spaces for program and data making it possible for each to be accessed simultaneously. This architecture was developed by Howard Aiken at Harvard University and was referred to as the Harvard Architecture, figure 8.1. This architecture was found to be complex as it had two separate memory spaces. Later a Hungarian mathematician, John von Neumann, observed that there is no fundamental difference between instructions and data. In fact instructions could be partitioned into two fields containing operations commands and addresses of data to be operated upon. Thus only a single memory space was essential for both instructions and data. This architecture was referred to as the von Neumann architecture and processors could be designed with only one memory space, Figure 8.1. The drawback of this architecture is that access could be made to either instructions or data at any one time. The building blocks of a processor include the Arithmetic Logic Unit (ALU), shift registers, and memory space. With these building blocks it is possible to add and subtract by shifting left or right using a few clock cycles but multiply and divide operations are more complex and require a series of shift, add, and subtract operations. Multiply and divide can be achieved in several clock cycles. In the decade starting from early 1970 the multiply times was reduced from 600 ns to 200 ns making real-time digital signal processing a reality. In the early 1970s there was a great need to increase speed, reduce size, and improve processing technologies of electronic devices that were entering the market. This meant increasing the performance and capabilities of integrated circuits. N-MOS was the core integrated circuit technology at the time. With N-MOS it was possible to support device densities of up to 100 000 transistors. With the availability of this technology single chip processors emerged into the market in the early 1980s. With the use of CMOS technology it has been possible to produce single chip processors having up to 4 000 000 transistors with multiply times of 40 ns for 32-bit floating point devices and 25 ns for some 16-bit fixed point devices.