|
Type B DTCs (Figures E10, E11, and E12):
The ECU illuminates the malfunction indicator lamp (MIL)
when the diagnostic runs and fails during 2 or 3 consecutive trips, depending on the regional requirements.
The first failure will cause the current status bit to be set, but the history and warning indicator requested
status bits do not set unless the diagnostic runs and fails during 2 or 3 consecutive trips.
•
Type C DTCs (Figures E13 and E14):
The ECU stores the DTC information into memory when the
diagnostic runs and fails. Type C DTCs do not illuminate the malfunction indicator lamp (MIL) but may
cause another indicator to illuminate.
DTC information includes the base DTC (two bytes), failure type byte, status byte, freeze frame data (emission
related ECUs only), failure record information, and other data such as flags, counters, timers, etc., specific to
the DTC. This information has limited duration usefulness. An automatic clearing of DTC information function is
implemented in order to avoid reporting out of date information. For Non-Powertrain ECUs, all DTCs are
cleared at the same time. This means that the timing of the automatic clearing of DTCs is based upon the most
recently detected DTC.
--``,,``````,``,,``,,,`,`,`,,-`-`,,`,,`,`,,`---
Page 321
GM WORLDWIDE ENGINEERING STANDARDS
GMW3110
•
Automatic Clearing of DTCs (Figure E15):
Automatic clearing of DTC Information is clearing all DTCs in
the ECU memory after a predetermined number of consecutive ignition on/off cycles with no test fail result.
The typical number of fault free ignition cycles is 40.
Figure E1: Non-Latching DTC (1 of 2)
WIRS
CDTCSPU
TNPSCPU
HDTC
TFSDTCC
TNPSDTCC
CDTC
DTCSBC
1
1
1
0
0
0
0
F
irs
t T
im
e
P
ow
er U
p
0
0
0
1
0
0
0
$25
1
0
1
0
1
$01
0
0
0
0
0
0
0
0
1
$01
0
0
1
0
0
0
0
1
$21
0
0
0
0
0
0
0
1
$01
1
1
0
1
1
0
1
1
$DB
1
0
0
1
1
1
1
1
0
0
1
1
1
1
$DB
$BB
1
1
1
1
0
1
1
$FB
1
$59
1
0
1
1
0
0
0
1
1
1
1
1
0
0
0
0
1
$19
1
1
$59
$39
0
0
1
0
0
0
0
0
1
0
0
1
0
0
0
1
0
0
1
0
0
0
0
0
1
$01
0
1
$25
1
1
1
1
0
1
$DB
1
1
0
1
1
0
1
1
0
$DB
1
Te
st R
un
s
an
d
P
as
se
s
T
es
t R
un
s
an
d
P
as
se
s
E
C
U
P
ow
er D
ow
n
E
C
U
P
ow
er D
ow
n
Power Cycle #1
Power Cycle #2
Power Cycle #3
Power Cycle #4
Te
st R
un
s
an
d
P
as
se
s
Te
st R
un
s
an
d
P
as
se
s
C
le
ar D
ia
gn
os
tic
In
fo
rm
atio
n
E
C
U
P
ow
er U
p
E
C
U
P
ow
er U
p
E
C
U
P
ow
er U
p
T
es
t R
un
s
an
d
F
ails
Te
st R
un
s
an
d
F
ails
E
C
U
P
ow
er D
ow
n
T
es
t R
un
s
an
d
P
as
se
s
Te
st R
un
s
an
d
F
ails
E
C
U
P
ow
er D
ow
n
WIRS
CDTCSPU
TNPSCPU
HDTC
DTC Not Set
TFSDTCC
TNPSDTCC
History DTC
CDTC
DTCSBC
Current DTC, Warning Lamp On
1
1
0
0
0
1
1
0
$25
Power Cycle #6
1
1
1
1
$FF
0
0
1
$25
$25
1
0
1
0
1
1
0
0
0
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
1
1
1
1
0
0
0
1
0
$DB
$BB
1
1
1
$25
1
1
1
1
1
0
1
1
1
1
1
1
1
$FF
1
1
1
0
$BF
1
1
1
1
1
$FF
1
EC
U
Po
w
er D
ow
n
1
1
1
1
1
1
Power Cycle #5
EC
U
Po
w
er D
ow
n
Power Cycle #7
Te
st R
un
s
an
d
Fa
ils
Te
st R
un
s
an
d
Fa
ils
C
le
ar D
ia
gn
os
tic
In
fo
rm
atio
n
EC
U
Po
w
er U
p
EC
U
Po
w
er U
p
EC
U
Po
w
er U
p
C
le
ar D
ia
gn
os
tic
In
fo
rm
atio
n
EC
U
Po
w
er D
ow
n
25.06.2020
WORLDWIDE ENGINEERING STANDARDS General Motors Local Area Network Enhanced Diagnostic Test Mode Specification
https://translate.googleusercontent.com/translate_f
285/298
© Copyright 2010 General Motors All Rights Reserved
February 2010
Page 321 of 336
Figure E2: Non-Latching DTC (2 of 2)
Page 322
GM WORLDWIDE ENGINEERING STANDARDS
GMW3110
Figure E3: Limited Duration Latching DTC (1 of 2)
Figure E4: Limited Duration Latching DTC (2 of 2)
WIRS
CDTCSPU
TNPSCPU
HDTC
TFSDTCC
TNPSDTCC
CDTC
DTCSBC
$DB
$DB
$39
$19
$25
$01
$DB
$39
$FB
$DB
$25
$01
$01
$21
$01
$DB
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
0
1
0
1
1
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
1
1
1
1
0
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
1
1
1
1
0
0
1
1
0
0
0
0
0
0
1
0
1
0
1
1
0
1
0
0
1
0
0
1
0
0
0
0
0
1
1
1
0
0
1
1
0
0
0
0
0
1
1
1
0
0
1
1
0
1
0
0
0
0
0
First T
im
e
P
owe
r Up
Te
st Ru
ns a
nd
P
ass
es
Te
st Ru
ns a
nd
P
ass
es
Te
st Ru
ns a
nd
Fa
ils
Te
st Ru
ns a
nd
Fa
ils
Power Cycle #1
Power Cycle #2
Power Cycle #3
Power Cycle #4
Te
st Ru
ns a
nd
P
ass
es
Te
st Ru
ns a
nd
P
ass
es
Te
st Ru
ns a
nd
P
ass
es
Cle
ar Dia
gn
ostic
In
fo
rm
atio
n
E
CU
P
owe
r Do
wn
E
CU
P
owe
r Do
wn
E
CU
P
owe
r Do
wn
E
CU
P
owe
r Up
E
CU
P
owe
r Up
E
CU
P
owe
r Up
Te
st Ru
ns a
nd
Fa
ils
WIRS
CDTCSPU
TNPSCPU
HDTC
DTC Not Set
TFSDTCC
TNPSDTCC
History DTC
CDTC
DTCSBC
Current DTC, Warning Lamp On
$25
$25
$25
$FF
$FF
$3D
$FF
$DB
$39
$25
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
0
1
0
1
1
1
1
1
1
1
0
0
1
1
0
0
0
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
0
0
0
1
1
0
1
1
0
0
0
0
1
1
1
EC
U
Po
w
er U
p
EC
U
Po
w
er U
p
EC
U
Po
w
er D
ow
n
EC
U
Po
w
er U
p
Te
st R
un
s
an
d
Fa
ils
Te
st R
un
s
an
d
Fa
ils
C
le
ar D
ia
gn
os
tic
In
fo
rm
atio
n
C
le
ar D
ia
gn
os
tic
In
fo
rm
atio
n
Power Cycle #6
Power Cycle #5
Power Cycle #7
EC
U
Po
w
er D
ow
n
0
1
0
0
0
EC
U
Po
w
er D
ow
n
25.06.2020
WORLDWIDE ENGINEERING STANDARDS General Motors Local Area Network Enhanced Diagnostic Test Mode Specification
https://translate.googleusercontent.com/translate_f
286/298
© Copyright 2010 General Motors All Rights Reserved
February 2010
Page 322 of 336
--``,,``````,``,,``,,,`,`,`,,-`-`,,`,,`,`,,`---
Page 323
GM WORLDWIDE ENGINEERING STANDARDS
GMW3110
Figure E5: Permanently Latched DTC (1 of 2)
Figure E6: Permanently Latched DTC (2 of 2)
WIRS
CDTCSPU
TNPSCPU
HDTC
TFSDTCC
TNPSDTCC
CDTC
DTCSBC
Te
st Ru
ns a
nd
Fa
ils
Power Cycle #1
Power Cycle #2
Power Cycle #3
Power Cycle #4
Te
st Ru
ns a
nd
P
ass
es
Te
st Ru
ns a
nd
P
ass
es
Te
st Ru
ns a
nd
Fa
ils
Te
st Ru
ns a
nd
Fa
ils
First T
im
e
P
owe
r Up
Te
st Ru
ns a
nd
P
ass
es
Te
st Ru
ns a
nd
P
ass
es
Te
st Ru
ns a
nd
P
ass
es
E
CU
P
owe
r Up
E
CU
P
owe
r Up
Cle
ar Dia
gn
ostic
In
fo
rm
atio
n
E
CU
P
owe
r Do
wn
E
CU
P
owe
r Do
wn
E
CU
P
owe
r Up
E
CU
P
owe
r Do
wn
1
1
0
0
0
1
1
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
1
0
1
1
1
0
0
0
0
1
0
0
1
0
0
1
0
1
0
0
0
1
0
1
1
0
0
1
0
0
0
0
1
1
1
1
1
1
1
0
0
1
1
1
0
0
0
1
1
0
0
0
0
0
1
1
1
1
1
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
0
0
1
1
0
0
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
$25
$01
$01
$DB
$DB
$21
$01
$DB
$DB
$DB
$BB
$9B
$25
$01
$BB
$FB
WIRS
CDTCSPU
TNPSCPU
HDTC
DTC Not Set
TFSDTCC
TNPSDTCC
History DTC
CDTC
DTCSBC
Current DTC, Warning Lamp On
EC
U
Po
w
er U
p
C
le
ar D
ia
gn
os
tic
In
fo
rma
tio
n
EC
U
Po
w
er D
ow
n
EC
U
Po
w
er D
ow
n
Power Cycle #5
EC
U
Po
w
er U
p
Power Cycle #6
1
1
1
0
0
1
1
1
1
1
0
0
1
1
1
1
0
0
1
$DB
$BB
1
$25
1
1
$25
0
0
1
0
0
1
0
0
1
0
1
0
1
$BB
0
0
1
1
1
25.06.2020
WORLDWIDE ENGINEERING STANDARDS General Motors Local Area Network Enhanced Diagnostic Test Mode Specification
https://translate.googleusercontent.com/translate_f
287/298
© Copyright 2010 General Motors All Rights Reserved
February 2010
Page 323 of 336
Do'stlaringiz bilan baham: |
