Publications prior to year 2000 are listed below:
Dissertation, Book Chapters, and Tutorial Notes
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T.Mangir, Submicron Device Modeling & Simulation, Reports to Xerox Corporation, Xerox Parc & Microelectronics Center, 1982-1999
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Mobile and Personal Computing and Communication: Wireless via Satellite, Invited, Microwave & Wireless Journal, 2/98
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"An Experiment in Transfer of Technology in Networks and Communications," Proceedings of NASA Technology 2006, October 1996
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"Reliability and Availability in Client/server Environments," Proceedings of IEEE Wescon Applications Conference, October 1996. (Invited –To appear)
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"Reliability and Availability in Client/Server Environments," Proceedings of Applications in Computers and Communications, October 1996. To appear (Invited, reviewed)
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"ATM Technology in Computing," Proceedings of Applications in Computer and Communications, WESCON, October 1996. To appear (Reviewed)
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"Wireless via Satellite: Communications Systems for Personal/Mobile Communication and Computations," to appear in Journal of Applied Microwave and Wireless (Invited, Reviewed).
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"Software Reliability Models," Presentation to Hughes, August, 1996
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"The Workshop Problem: Telemedicine System Design," Presentation Notes, IEEE Conference on High Speed Interconnections in Digital Systems, May 1996. (Reviewed)
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"The Telemedicine Design Challenge " IEEE Conference on High Speed Interconnections in Digital Systems, Working Group Notes, May 1996. (Reviewed)
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"Techniques for Network Integrity and Restoration in ATM LANs," in preparation for submission
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"Satellite Communication Systems for Personal/Mobile Communication and Computation," Invited Paper, Proceedings Applications Conference on Communications Technology, WESCON, November 7-10, 1995, San-Francisco, CA. Nov.1995, (refereed).
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"The Future of Public Satellite Communications," Invited Paper, Proceedings, IEEE Aerospace Applications Conference, February 1995, pp. 393-404, (refereed)
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Workshop Summary, 1994 IEEE Workshop on High Speed Interconnections for Digital Systems, IEEE LEOS Newsletter, Fall 1994
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"An Introduction AIX: IBM's UNIX," Tutorial Notes, Fall 1994
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"Client/Server Technology: An Overview," presentation and lecture notes, IBM Corporation, Summer 1994
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"Client/Server Technology: An Overview," Presentation and lecture notes, IBM Corporation, Summer 1994
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"Pacing and Learning in Teacher Education and Teaching," with Gulsun Zeytinoglu of IBM, World Assembly of International Council on Education for Teaching, July 1994, Istanbul, Turkey. ICET Conference Record, pp.37
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"Teacher's Role as a Guide for Learning to Learn," World Assembly of International Council on Education for Teaching, July 1994, Istanbul, Turkey. ICET Conference Record, pp.12
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"Overview of Multichip Module Technology for Packaging of High Speed Digital Systems," 1994 IEEE Workshop on High Speed Interconnections for Digital Systems, May 22-26, 1994, Santa Fe, NM
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"Design Considerations for a Photonic Interconnection System," Private Report, June-July 1993, Palo Alto, CA
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"Application Characteristics and Requirements for High Speed Digital Systems," Tutorial Notes, 1993 IEEE Workshop on High Speed Interconnections for Digital Systems, May 23-27, 1993, Santa Fe, NM
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" Low Cost Networked Ground Stations," Research Report to DOD and NASA, 1992, TRW, No: 92228306. (Also developed a short Videotaped Demo will make available upon request.)
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"Low Cost Ground Station Projects," Invited Presentation, DOD Integrated Satellite Control Systems Conference, Aerospace Corporation, El Segundo, CA, November 1992
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Commercial and International Satellite Systems, An Overview and Interface to Computer Networks, TRW, pp.23-1992
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"Commercial Satellite Networked Ground Stations," Tutorial, Ground Stations Conference, TRW Space and Technology Group, 1992, pp. 23-75
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"Defect and Fault-Tolerance in VLSI and WSI Systems," Editor with Professor Maria-Giovanna Sami of Polytechnico de Milano, Italy and Gabrielle Saucier of Nacional Polytechniques de Grenoble, France, Plenum Publishers, 1991
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On-Board Processing, Tutorial, TRW 1989
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"Effect of Interconnections on Chip Architectures on Designing Very Large Scale, VLSI, and Wafer Scale, WSI, Systems," Part 1 in Wafer Scale Integration, Earl Schwarzlander (Ed.), Kluwer Publications, 1989
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Fault-Tolerant Design Techniques for Digital Systems, Tutorial, TRW, 1987
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"An Approach to Fault- Tolerant Design of WSI FFT Processor," with Hideki Mori, Special Issue of Real Time Systems, Ed. Stankovic, 1987
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T.Mangir, Self Organizing and Self-Repairing Wafer Scale Integration,. IEEE, Workshop on High Density and High Reliability Microelectronics, 1987
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"Design for Testability and Diagnosis", NATO Advanced Studies Institute, July 1987, Como, Italy
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"Yield Modeling for WSI: A State Report", WSI Workshop Proceedings, March 1987 (Eds.) G. Saucier & J. Trilhe, North Holland
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"Impact of Behavior and Dependent Failures on WSI Yield Models", IFIP Conference on WSI (invited presentation), 17-19 March, 1986, Grenoble, France
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Mangir, T.E. "Fault Tolerant Design and Wafer Scale Integration," Notes for IEEE Tutorial. IEEE Computer Society, l985
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Mangir, T.E. "Applications of AI and Expert Systems to Logic Design," in E.Horbst (ed.) Advances in CAD for VLSI, North Holland, 1985
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Mangir, T.E. "Expert System Applications to VLSI CAD and CAT", Notes for IEEE Tutorial. IEEE Computer Society, l984. (Also published as a STEP-84 Monogram by Technological University of Helsinki, Finland, 1984.)
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Mangir,T.E. "Use of on Chip Redundancy for Fault-Tolerant VLSI Design," Ph.D. Dissertation, UCLA, June 1981. Also published as a Technical Report of Computer Science Department, CSD 8202O1, University of California, Los Angeles, February 1982. (Also published as a research monograph by Kluwer Publications, Professor Jonathan Allen (of MIT) Consulting Editor, 1982).
Refereed Articles
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Duran, J., Mangir, T.E., " Application of Signature Analysis to the Concurrent Test of Microprogrmmed Control Units," Microprocessing and Microprogramming, Special Issue on fault-tolerance, Vol. 20, pp.309-322, 1987
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Mangir, T.E. "Sources of Failures and Yield Improvement for VLSI and Restructurable Interconnects for RVLSI and WSI: Part II Restructurable Interconnects for RVLSI and WSI," Proceedings of the IEEE Vol. 72, no. 12,pp. l687 1694, December 1984 (invited).
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Mangir, T.E. "Sources of Failures and Yield Improvement for VLSI and Restructurable Interconnects for RVLSI and WSI: Part I Sources of Failures and Yield Improvement for VLSI," Proceedings of the IEEE vol. 72, no. 6, pp. 690-709, June 1984 (invited)
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Mangir, T.E. and Avizienis, A. "Fault Tolerant VLSI Design: Effect of Interconnect Requirements on Yield Improvement of VLSI Designs," IEEE Transactions of Computers, Vol.72, no. 6, pp.690-709, 1982
Refereed Articles in Conference Proceedings -
"Design of a Microprogrammed Control Unit with Built-in-Self-Test" with J. Duran, Special issue Mini-Micro Systems on Fault-Tolerant Design, 1987
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"Revisiting the Negative Binomial Distribution for the Modelling of Dependencies in Manufacturing of VLSI Circuits," International Conference on Defect and Fault-Tolearance of VLSI Systems, Nov. 5-8, 1990, Grenoble, France.
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"Interconnect Technology Considerations for the WSI of a Parallel 2-D FFT Algorithm," International Conference on Defect and Fault-Tolerance of VLSI Systems, Nov. 5-8, 1990, Grenoble, France.
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"Fault-Tolerant Wafer Scale Architecture for Variable Point FFT and Signal Processing," with Hideki Mori, July 1989, Como, Italy.
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"Two Dimensional Wafer Scale Systolic Arrays for FFT," 3rd International IFIP Workshop on Wafer Scale Integration, June 1989, Orlando, FL. (Invited).
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"WSI Yield Modelling: Myth vs. Reality: Impact of Redundancy on VLSI/WSI Yield," Panel member, Design Automation Conference, 29 June- 2 July 1986, Las Vegas, N. (Invited)
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Mangir, T.E., Lam, A., and Luong, H. "An Interactive Tool for VLSI Testability Analysis Based on Fault Detection Probability," IEEE International Conference on Computer Aided Design, Santa Clara, CA, November 1984.
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"Fault Tolerance Issues in the Implementation of Wafer Scale (WSI) Systems," Panel Presentation, IEEE Fault Tolerant Computing Symposium, FTCS 14, Orlando, FL, June 1984.
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Mangir,T. E. "Interconnect Technology Issues for Testing and Reconfiguration of WSI," Proc. of IEEE 1984 VLSI In Computer Design, 1984.
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Mangir,T. E. and Raghavendra, C. S. "Issues in the Implementation of Fault Tolerant VLSI and Wafer Scale Integrated Systems," Proc. of IEEE VLSI In Computer Design, 1984
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Mangir,T.E. and Raghavendra, C. S. "On the VLSI Implementation of Fault-Tolerant Architectures", Proceedings of IEEE ICCD 84:VLSI in Computer Design, Port Chester, NY, Oct 31 Nov 3, 1983.
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Mangir, T.E. "Impact and Limitations of Interconnect Technology on VLSI and Restructurable VLSI Design", Proceedings of the IEEE ICCD 83:VLSI in Computer Design, Oct. 31 Nov 3,1983,Port Chester, NY.
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Duran,J. and Mangir, T.E. "A Design Approach for a Microprogrammed Control Unit With Built-in Self Test", Proceedings of IEEE Workshop on Microprogramming, MlCR0 16, Pennsylvenia, Oct 11 14,1983.
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Mangir, T.E. "Design for Testability: An Integrated Approach to VLSI Testing," Proc. IEEE International Conference on Computer Aided Design, ICCAD 83, Santa Clara, California, Sept. 1983.
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Mangir, T.E. and Avizienis, A. "Effect of Interconnect Requirements on the Yield Improvement of VLSI Circuits," Proc. IEEE Compcon 81, pp.322 326, San Francisco, February 1981.
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Mangir, T.E. "Fault Modes and Their Effect on Chip Design," Proc. IEEE International Conference on Circuits and Computers, ICCC 1980, pp.685 687, New York, October 1980.
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Mangir, T.E. and Viswanathan, C.R. "Impact of Semiconductor Technology on Microcomputer Architecture," Proc. International Symposium on Mini and MicroComputers, Zurich, Switzerland, June 1978.
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Mangir, T.E. "A Modular Multi Microcomputer System," Proc. International Symposium on Mini and MicroComputers, pp. l72 175, Zurich, Switzerland, June 1975.
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Mangir, T.E. " Microcomputer Selection Considerations" Proc. International Symposium on Mini and MicroComputers, pp.44 50, Zurich, Switzerland, June 1975.
Other Publications and Technical Reports: -
"Software Reliability Models, " Report to RADC, TRW Defense and Space, 1989
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"Reusability Project Study Report, " TRW Defense and Space, 1989
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"Rad-Hard 32-bit RISC Processor Design for High Reliability Applications, "Proposal (Funded over $10M) to RADC, May 1988
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"Symbolic Space Born Processor Design and Features," Report to NASA Ames Research Center and Symbolic, Inc., March 1988
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Mangir, T.E., "Research Summary on Applications of Expert Systems to CAD and CAT of VLSI," ACM Sigart Special Issue 1985
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Mangir, T.E., "EXCAT: A Design for Testability System for VLSI," Proceedings of Second VLSI Technology Symposium Taipei, Taiwan, 1985 (Invited)
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Mangir, T.E. and Mori, H. " Wafer Scale Systolic Arrays for Parallel FFT," Proc. International Conference on Signal Processing Applications, Paris, May 1985. (Invited)
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Mangir, T.E., "Yield vs. Redundancy for WSI," Quarterly Research Report to IBM Corporation, January 1985
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"A Proposal for a Concerted University lndustry Electronics/ Microelectronics Program," Turkish National Research Council, Ankara, Turkey, September 1984
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"Directions for the National Microelectronics Program: A Proposal for Viable VLSI Designs and Design Tools," Joint Meeting of Swedish University; Industry and Government Representatives), Uppsala, Sweden, August 1984
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"Recovery in Distributed Fault Tolerant Systems: Session Introduction", IEEE Distributed Computer Conference, May 1984
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Mangir, T.E.," Mixed Mode Simulation for VLSI," March 1981, Internal Report, Xerox Corporation
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Mangir, T.E., "Strawman VLSI I/O Controller," March 1981, Internal Report, Xerox Corporation
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Mangir, T.E.,"I/O Controller Requirements for Document Processors," February 1981, Internal Report, Xerox Corporation
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Mangir, T.E7, " I/O Controller Requirements for Existing Xerox Systems," February 1981, Internal Report, Xerox Corporation
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Mangir, T.E.," Chip architecture of Xerox VLSI I/O controller," July 1980, Internal Report, Xerox Corporation
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Mangir, T.E.," Requirements of a high bandwidth high speed universal controller for Ethernet," June 1980, Internal Report, Xerox Corporation
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Mangir, T.E.," Feasibility of a VLSI I/O Controller, April 198O, Internal Report, Xerox Corporation
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Mangir, T.E.," VLSI Design limit J imposed by hot e trapping, August 1979, Internal Report, Xerox Corporation
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Mangir, T.E.," High drive, minimum area multiplexed row driver for 128K ROM," August 1979, Internal Report, Xerox Corporation
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Mangir, T.E.," Sense amplifier choices for 128K ROM," June 1979, Internal Report, Xerox Corporation
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Mangir, T.E., "Organization of 128K VLSI ROM," March 1979, Internal Report, Xerox Corporation
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Mangir, T.E.," Design Specifications of 128K VLSI ROM," March 1979, Internal Report, Xerox Corporation
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Mangir, T.E.," Comparisons of Various mask programming for 128K VLSI ROM," March 1979, Internal Report, Xerox Corporation
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Mangir, T.E.," Process and device modeling of double poly 2 phase CCD's," February 1979, Internal Report, Xerox Corporation
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Mangir, T.E.," Use of Redundancy for Yield Improvement for VLSI memories," January 1979, Internal Report, Xerox Corporation
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Mangir, T.E.," Alpha particle sensitivity of High Density VLSI memories," October 1978, Internal Report, Xerox Corporation
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Mangir, T.E.," Design rule suggestions for NSIL III VLSI Technology," September 1978, Internal Report, Xerox Corporation
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Mangir, T.E.," Substrate current characteristic of NSIL II devices," September 1978, Internal Report, Xerox Corporation
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Mangir, T.E.," Hot electron trapping in short channel enhancement NMOS devices," September, 1978, Internal Report, Xerox Corporation
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Mangir, T.E.," Punch thru phenomena in Short Channel VLSI Devices," August 1978, Internal Report, Xerox Corporation
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Mangir, T.E. "Air Isolated GaAs MOSFETs with Schottky Barrier Spacings" Technical Report to ARPA on Laser Window Materials, 1972, USC
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Mangir,T.E., Lam, A.,and Luong, H., "An Interactive Tool for VLSI Testability Analysis Based on Fault Detection Probability," Technical Report CSD840060,UCLA
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Chen Ellis,G., Mangir,T.E., "Rule Based Generation of Test Structures for VLSI," Technical Report CSD 840059,UCLA
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Bouchon,P., Mangir, T.E., "An Intelligent Router for VLSI Design," Technical Report CSD 840058,UCLA
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Duran,J., Mangir, T.E. and Lang,T., "Design of a Microprogrammed Control Unit with Built in Self Test," Technical Report CSD 840057,UCLA
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Duran,J.,and Mangir, T.E. "A Design Approach for a Microprogrammed Control Unit with Built in Self Test," Technical Report CS~840056,UCLA
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Mangir, T.E. and Fuenmayor, M., "Meta-level Control for a DRC Program," Technical Report CSD 840055, UCLA
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Mangir, Tulin E. & Soetarman, B. "Control Structures in a Prolog Based Production System," Technical Report CSD 840054, UCLA
Invited Presentations at Professional Meetings -
"Expert Systems for Testing of VLSI: An Overview," IEEE Workshop on Testability (invited), 21-24 April, 1986, Lake Tahoe, NV
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"Fault Tolerant Design and Wafer Scale Integration," Tutorial, IEEE Compcon, San Francisco, February 1985. (Invited)
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"Expert Systems for CAD," Panel Presentation, IEEE International Conference on CAD, ICCAD 84, Santa Clara, November 1984, (Invited).
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"AI Techniques for Test Generation, Design for Testability," IEEE International Test Conference Tutorial, Philadelphia, October 15,1984. (Invited).
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"Expert System Applications to VLSI CAD and CAT", IEEE Computer Society, Tutorial Week West, San Francisco, October 4 5, 1984. (Invited)
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"Yield vs. Redundancy and Interconnect Density for WSI," Wafer Scale Integration Workshop, Semiconductor Research Corporation, RTI, NC, September 1984. (Invited)
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"Expert Systems for CAD," STEP 84, Helsinki University of Technology, Helsinki, Finland, August 1984. (Invited Lecture)
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" Fault Tolerance Issues in the Implementation of Wafer Scale (WSI) Systems," Panel Presentation, IEEE Fault Tolerant Computing Symposium, FTCS 14, Orlando, FL, June 1984
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"Integrated Testing Approaches for VLSI and WSI," IEEE Napa Valley Test Workshop, May 1984. (Invited)
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" Expert System Applications to CAD and CAT," Tutorial, IEEE COMPCON, February 27, 1984, San Francisco. (Invited)
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"Restructurable Interconnections for VLSI and WSI," IEEE International Conference on Computer Design ICCD 84: VLSI in Computer Design, Oct 31 Nov 3, 1983, Port Chester, NY. (Invited)
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"Design for Testability:An Integrated Approach to VLSI Testing", IEEE International Conference on Computer Aided Design (ICCAD 83), Sept.12 15,1983,Santa Clara, CA
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"Testing as Part of Fault Tolerant Design" LA Chapter, IEEE Computer Society Meeting, March 1983. (Invited)
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"Failure Modes for VLSI and Effect on Fault Tolerant VLSI Design," Joint Meeting IEEE Computer and Reliability Societies, LA Chapter, March, 1983. (Invited)
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"Wafer to System Level Requirements for VLSI BIST (Built in Self Test)" IEEE BIST Workshop, March 14 17, 1983, Kiawah Island, SC. (Invited)
Other Invited Technical Presentations: -
"Scenarios for Ground System Network and I&T (Integration and Test) of GTE Spacenet Satellite System, " GTE, Colorado, April 1990
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"WaferScale FFTs for Signal processing," presentation to RADC, Rome, NY. 1989
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"Fault-Tolerance for VLSI and WSI," Invited Video broadcast Lecture at USC, EE-Systems, May 1989. (Invited by Prof. C.S. Raghavendra).
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"Considerations for Wafer Scale Design of 2 D Systolic Arrays for FFT," Workshop on Wafer Scale Integration, South Hampton, England, July 1985. (Invited).
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"EXCAT: An Expert System for Design for Testability," IEEE Workshop on Design for Testability, Beaver Creek, April 1985
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"Expert Systems for VLSI Design: Some Examples," Los Angeles Scientific Center, IBM February 1985. (Invited)
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"Interconnections for Reconfiguration and Testing for Wafer Scale Integration," Electrical Engineering and Computer Science Department, University of California, Berkeley, November 1984. (Invited).
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"Reconfiguration and Testing for Wafer Scale Integration," CSL, Stanford University, November 1984. (Invited)
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"Interconnect Technology Issues for Testing and Reconfiguration of WSI," IEEE VLSI in Computer Design Conference, Port Chester, NY, October 1984
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"Issues in the Implementation of Fault Tolerant VLSI Architecturs," IEEE VLSI in Computer Design Conference, Port Chester, NY, October 1984
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"Expert System Applications to CAD and CAT of VLSI," Southern California AI Society (SCAIS) Meeting, Los Angeles, October 1984
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"A Proposal for a Concerted University industry Electronics/ Microelectronics Program," Turkish National Research Council, Ankara, Turkey, September 1984. (Invited)
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"Directions for the National Microelectronics Program: A Proposal for Viable VLSI Designs and Design Tools," Joint Meeting of Swedish University; Industry and Government Representatives), Uppsala, Sweden, August 1984. (Invited).
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"Design Techniques for Testable Design of VLSI Chips," UppsalaUniversity, Uppsala, Sweden, August 1984. (Invited Seminar)
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"Intelligent CAD Systems for Electronic Design," Nokia Data Corporation, Helsinki, Finland, August 1984. (Invited)
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" Current Research Topics in VLSI, WSI and Integrated Design Environments," CSD Archives Seminar, UCLA, 1984
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"Recovery in Distributed Fault Tolerant Systems: Session Introduction", IEEE Distributed Computing Conference, May 1984
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"Yield and Reliability Improvement for VLSI and WSI," CSD Department Seminar, UCLA, April 1984
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"Current Research Topics in VLSI and WSI and Integrated Design Environments," UCLA MCASE presentation TRW, April 1984. (Invited)
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"On the VLSI implementation of Fault Tolerant Architectures", ICCD 84:VLSI in Computer Design, Oct 31 Nov.3, 1983, Port Chester, NY
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"Impact and Limitations of Interconnect Technology on VLSI and Restructurable VLSI Design", ICCD 84:VLSI in Computer Design, Oct 31 Nov 3,1983,Port Chester, NY
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"Concurrently Testable VLSI Architectures for Real Time Applications", Fairchild Palo Alto Research Center, Oct 1983 (Invited)
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"Design for Testability: An Integrated Approach to VLSI Testing", International Conference on Computer Aided Design (ICCAD 83), Sept.12 15,1983,Santa Clara, CA
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"Microcomputers for Control Applications," Bosphorus Univ. Istanbul, Turkey, September 1982
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"Speech Synthesis Techniques," Middle East Technical University, Ankara, Turkey, August 1982
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"Fault Tolerant Design of Digital Systems," IBM, San Jose, August 1982
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" Design for Testability, on Chip Test Techniques for VLSI," Hughes, EODS, El Segundo, CA, May 1982
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"Sources of Failures and Yield Improvement for VLSI Chips," Hughes Research Laboratories, Malibu, CA. April 1982
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"Spectrum Analysis Techniques," Hughes Research Laboratories, Malibu, Feb.1982
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"Fault Tolerance Techniques for Signal Processing Chips," Rockwell International Microelectronics Center, Anaheim, CA., Feb. 1982
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"Use of on Chip Redundancy for Fault Tolerant VLSI," Bell Telephone Laboratories, Naperville Ill., Andover, Mass., Murray Hill, N.J. January 82
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