Страница 1 мировой engineering стандарты общая спецификация

(Vp) is ≥ 9.0 V
DC
.
•
The ECU shall be capable of reading and writing to Type 1 memory with
9.0 V
DC 
≤ (Vp) ≤ 16.0 V
DC
.
•
An ECU must provide enough Type 1 memory to hold the programming routines and provide adequate
buffer space to meet the programming timing requirements specified in the General Assembly
Programming And Test section of the GM Bill Of Process (BOP).
2. Type 2 memory (typically EEPROM) contents shall be retained at all times even without (Vp) voltage
present.
•
The ECU shall be capable of reading and writing to Type 2 memory with
9.0 V
DC 
≤ (Vp) ≤ 16.0 V
DC
.
•
The number of erase/write cycles shall be documented in a CTS or SSTS. Type 2 memory used solely for
programming (i.e., not updated by operational software during normal vehicle operation) requires a
minimum of 500 erase/write cycles.
3. Type 3 memory (typically Flash) contents shall be retained at all times even without (Vp) voltage present
and it shall be protected from unauthorized erasure or modification.
•
The
ECU
shall
be
capable
of
reading
Type
3
memory
with
9.0 V
DC 
≤ (Vp) ≤ 16.0 V
DC
.
•
It shall be possible via the GMLAN bus to erase and program the contents of Type 3 memory of an ECU
with 
9.0 V
DC 
≤ (Vp) ≤ 16.0 V
DC
.
•
The number of programming cycles shall be documented in a CTS or SSTS. Type 3 memory used solely
for programming (i.e., not updated by operational software during normal vehicle operation) requires a
minimum of 100 erase/write cycles.
Note: 
The voltage levels for retaining memory contents specified in this section are for use during a
programming event. Product performance requirements will most likely result in more stringent requirements.