Interpreters Document



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dps Interpreters

1. Executive Routine - 
The
communications executive logic coordinates the reprogramming event. It has knowledge of the 
size of the data and addresses to be reprogrammed. It coordinates error handling of the Flash and 
Communications I/O routines and determines when the reprogramming event is complete. 
2. Communications I/O Routines - 
The Communications I/O Routines consist of the minimum amount of I/O support that is required for 
reprogramming. This piece is typically a subset of the normal operation Communication I/O routines. 
When designing the Communication I/O routines, it is possible to make assumptions on what part of 
the Communications I/O software must be supported since the Programming Instructions will be 
written in conjunction with the Reprogramming Algorithm. 
 
3. Reprogrammable Device I/O Erase/Write Routines - 
The
Reprogrammable Device I/O Erase and Write Routines allow access to the reprogrammable 
device and include functions such as turning programming voltage on and off, erasing, writing, and 
checking the erase status of the memory. Error checking of these functions is performed to inform 
the Executive Routine whether or not to continue Reprogramming. 
 
4. Checksum Verify Routine - 
Checksums are typically calculated to verify that each block was transferred into RAM properly. At 
the end of reprogramming a section, the memory that has been written to is typically check summed 
to ensure that it was written successfully.
 
 
5. Exit Routine - 
The Exit Routine ensures RAM is left in the erased state that is acceptable to the operational 
software‟s initialization logic. The communications hardware may need to be reconfigured to normal 
operation conditions. At the end, a power up reset is typically invoked to put the Controller back into 
its normal operational state. 
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