cuted instruction in an analogous way. In the conventional automation circuit of Figure 7.9, the
relay C is activated when there is voltage at its ends. If the final RLO before the activation instruc-
tion is logical “1”, then the variable specified in the instruction is activated. All the activation
instructions depend on the RLO and when this is logical “1”, they cause activation of the variables
The simplest activation command is the instruction “=” that it is based on the logic “activate
while RLO is valid”. That is, for as long as RLO = “1”, the corresponding variable (output or
auxiliary bit) contained in the instruction is activated. Once the RLO becomes a logical “0”, the
variable is deactivated. This logic is repeated continuously, as long as the operation of the PLC
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remains. The switching of RLO from “0” to “1” and from “1” to “0”, and hence the activation/
deactivation alternation of the variable cannot exceed the cycle scanning frequency of the PLC
valid for the specific executed program.
The next activation command is the set (S) instruction that is based on the logic “activate
the variable permanently”. In particular, if the RLO = “1”, the corresponding variable (output or
auxiliary bit) contained in the instruction is activated, and it remains like this even if the RLO
becomes a logic “0”. For the variable counter C, the activation with the set instruction is achieved
with the same conditions and aims to put the counter to the value previously loaded in the accu-
mulator. This means that the execution of the instruction “S C7” will result in C7 = “value of the
register content”.
Given the above functionality of the set instruction, it is obvious that once a variable is activated,
for example an output via the S instruction, there is no way to deactivate it as long as the PLC oper-
ates. For this reason, the reset (R) instruction, which has the inverse logic from the set one, has been
introduced. In particular, if RLO = “1”, the corresponding variable (output or auxiliary bit) is deac-
tivated (logical “0”) and remains off even if the RLO becomes a logical “0”. As in the previous case,
the reset instruction for a counter cancels the current content of the counter, giving to it a zero value.
Overall, it could be concluded that the pair of instructions S and R is the digital implementa-
tion of the electromechanical latch relay. It is also important to remember that the latch relay in
this case has two coils, one for relay activation and one for deactivation. If the latch relay is ener-
gized and, subsequently the voltage from the normal coil is released, the relay does not switch off
as a common relay would do, but remains continuously on. To deactivate it, an electrical voltage
should be applied to the second coil.
Generally, with the set instruction, a timer is triggered and starts counting the time we have
previously loaded into the accumulator, while it provides an output signal according to the imple-
mented time function. The set instruction for the timers is treated separately for the following two
reasons. First, each timer can implement various time functions (on-delay, off-delay, pulse, etc.).
Therefore, together with the set trigger instruction of the timer, the type of time function that the
PLC will implement should also be defined. This functionality is performed with a second code
letter “X”, which is marked in Table 7.1. In the position of X, a letter that uniquely determines
the type of the specific time function is assigned. For this specific issue, there is no standardiza-
tion among the PLC manufacturers. For example, in some small PLCs, the manufacturer states
that the T1-T20 timers are ON-delay type, while the T21-T40 are the OFF-delay type and so
on. Subsequently, the Siemens timing system and notations will be adopted in order to be able to
program some simple applications.
Secondly, the set instruction for a timer cannot work as a simple set instruction for outputs
and auxiliary bits. The reason is that if the RLO remains at a logical “1”, it cannot continuously
set the timer—something that is not problematic in the case of an output or an auxiliary bit—
because it means that the time will be continuously updated and the timer will never count for
the desired specific time. In order to overcome this problem, manufacturers have introduced the
functionality of “RLO pulse rising” activation. This means that a timer is activated only when
the RLO changes from a logical “0” to a logical “1” (pulse rise). If the RLO remains constant at a
logic “1”, the timer operation is not affected. To recount the time in a timer, the RLO should be
changed from a logical “1” to a logic “0”, and then again from a logical “0” to a logic “1”, to create
the required pulse rise.
The reset instruction applied on a timer causes its time zeroing if RLO = “1”, without the need
to have a pulse rising RLO. The reactivation of the timer, after the reset, requires a new pulse rise
of the RLO that will result in a new execution of the “SX” instruction.
