Introduction to Industrial Automation

Figure 7.10  Primary and secondary RLO on the execution of Boolean instructions.

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Basic Programming Principles of PLCs 

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instruction. When the CPU finds what it is looking for at the corresponding memory location of the 

variable, then the returning search result is a logical “1”. If the CPU finds the opposite of what it is 

looking for, then the conclusion is a logical “0”. This result of the first sub-action is called “second-

ary RLO” because it is an intermediate logical result that in itself has no value unless it is combined 

with the primary RLO. For example, the statement “the contact S

1

 is closed” has no valuable infor-

mation, unless it is combined with an additional statement, e.g., “there is voltage before contact S

1

 

(= primary RLO)”, which means that “the contact S

1

 is closed and a voltage exists”, and thus the 

relay will be energized if no other switching contact exists. The second sub-action of a Boolean logic 

instruction includes the logical action that should be performed between the secondary RLO (the 

contact S

2

 is open) and the primary RLO that has been generated by the execution of the previous 

instruction (there is voltage after the S

1

 contact). The result of the logical operation is that the new 

primary RLO (no voltage after contact S

2

), replaces the previous primary RLO, which is generally 

lost. This result is kept temporarily only when there are parallel Boolean logical branches (OR). 

Therefore, the primary RLO is the RLO created after the complete execution of an instruction.

When the executed instruction is the first one in a series of instructions, (in the case of LAD 

language) or in an instructions’ list (in the case of Boolean language), then because there is no 

RLO extracted by the above logical process, the CPU itself produces an RLO. This case is like 

stating that there is voltage at the +24-0 V DC power supply of the classic automation circuit. 

The first RLO that the CPU produces is such that it does not alter the Boolean logic of the first 

instruction, which means that it is a logical “1” if the first instruction is a logical AND, or logical 

“0” if the first instruction is a logical OR.

After executing an activation instruction, the primary RLO is erased permanently and begins 

the creation of a new RLO in the next branch of the program (for the case of LAD) or in the next 

instructions group (for the case of Boolean language). In the classic automation circuit of Figure 

7.9, if the relay C is activated, it is not necessary to know that there is voltage at point A. This infor-

mation is valueless because, in reality, it is inherent from the statement “the relay C is activated”. 

The same applies if the relay is not activated because this is equivalent to the statement “there is no 

voltage at point A”. In a similar approach, in programmable logic, the last primary RLO before the 

activation instruction does not need to be stored after executing the instruction, since the output 

C has been activated. The same is true also in the case where the last RLO is a logical “0”, since 

then the output is also not activated as a final statement, and therefore it is not necessary to know 

that the RLO was “0” and thus it can be erased.

During the execution of the first sub-action of a Boolean logic instruction, the CPU searches 

for the state of the variable contained in the instruction at the corresponding memory location of 

the variable. If the variable is an input (I) or output (Q), then the CPU examines what is the con-

tent of the corresponding memory location in the I/O image table, in order to create the secondary 

RLO. Similarly, if the variable is an auxiliary bit (M), the CPU examines the storage memory of 

the auxiliary bits (logic coils), while for the case of timers (T) and counters (C), the CPU examines 

the corresponding memory dedicated for timers and counters.