Introduction to Industrial Automation


Figure 6.31  Usual organization of memory in PLCs



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Introduction to Industrial Automation by Stamatios Manesis, George

Figure 6.31  Usual organization of memory in PLCs.


Basic Operating Principles of PLCs 



 



229

instructions in assembly. The software often contains instructions that require data from 

other parts of the memory. In this case, the operating system is driving the microprocessor 

to collect these data for further processing. For example, if one instruction refers to a digital 

input state, the microprocessor is responsible for tuning the operation to get this value from 

the memory, specifically from the “input image table”.

 



Every time that the operating system requests the microprocessor to scan the current states 



of the inputs, it stores this information in the input mapping memory, also called the input 

image table. Subsequently, as the microprocessor executes the automation program, various 

state updates for the output devices are produced. These states are stored from the microproces-

sor in the output mapping memory, also called the output image table. When the execution 

of the automation program’s instructions is finished, the output modules are updated, which 

means that the stored states in the output mapping memory are transferred to the outputs.

 



As the operating system executes the various operations through the microprocessor, it is 



normally required to temporarily store some information or current results. For this pur-

pose, a specific memory sector from the RAM is dedicated, where the user has no access.

 



When the automation program contains instructions that are related with counters, timers, 



auxiliary bits, and data functions, then another specific sector of the memory is needed for 

storing the corresponding parameters. For example, the CPU has to store the number and 

type of time units (e.g., ms, sec, min, etc.) in the case of timers, or the limits and the count-

ing step for the case of counters. When an automation program’s instruction is executed that 

concerns a counter or a timer, the operating system drives the microprocessor to seek the 

corresponding data in this memory sector.

At this point, the role of the auxiliary memory bits should also be explained. From the design of 

classical automation circuits, it has been indicated that the implementation of the logic according 

to which the controlled system operates, requires the utilization of auxiliary relays multiple times. 

The main role of these auxiliary relays is to represent an operational state of the automated system, 

and to provide necessary NC and NO contacts, which are inserted properly in the automation 

circuit. In programmable automation, the role of an auxiliary relay takes a simple memory location 

of a single bit. The activation and deactivation of an auxiliary relay is equivalent to the storage of a 

logical “1” or “0” respectively, in the memory sector dedicated for this purpose. The utilization of 

the relay’s auxiliary contacts is equivalent to calling functions of an auxiliary memory bit through 

the automation program instructions. Since this call can take place as many times as necessary in 

an automation program, this is referred to in programmable automation as an “infinite number of 

contacts” situation. The memory locations with the auxiliary bits are sometimes mentioned also 

as “internal coils” or “logical coils” in correspondence to the coils of the auxiliary relays. Every 

auxiliary memory bit in the corresponding memory location has its own address, so that it can be 

defined uniquely through the related instructions.

After the description of the I/O modules, CPU structure, memory, and communication and 

data exchange buses, the overall functionality and construction of one PLC can be addressed. This 

component-based approach is indicated in the block diagram of Figure 6.32. In short, the overall 

operation of a PLC involves the following operations:

  1. The CPU sequentially defines the addresses of the inputs through the address bus, transfers 

the states of the inputs through the data bus, and stores them in the input mapping memory.

  2. The CPU sequentially executes the automation program instructions, stored in the corre-

sponding memory.



230

 



  Introduction to Industrial Automation

  3. The results from the execution of the output activation or deactivation instructions are 

stored in the output mapping memory.

  4. When the automation program instructions refer to auxiliary bits, timers, counters, and 

other internal units, then the microprocessor is referring to corresponding memory locations 

through the data and address buses.

  5. The CPU, by sequentially defining the addresses of the outputs through the address bus, 

transfers the output states from the output mapping memory to the corresponding outputs 

through the data bus. This output update creates a corresponding change in the operational 

states of the output devices.

  6. All the previous actions are driven from the operating system stored in the ROM.

I1.0

I3.1


RAM

...


Timers

Instruction

scanner

Memory


ROM 

Operating

system

Counters


Data

memory


Battery

Auxiliary bits

(logic coils)

Input


mapping

memory


Output

mapping


memory

Addres


s

decoder 


Addres

s

decoder 



Input module

Output module

I1.0

I1.1


I1.2

I1.3


Optional

EEPROM


Automation

program


Clock

Microprocessor

Program

counter


Decoder

Instruction

register

Address


bus

Data


bus

0002


0000

0001


0003

Automation

program

PLC memory

I1.3

I2.1


Q1.5

...


Register

Address


Q0.0

Q0.2


Q0.3

Q0.1



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