Copyright 20 13 Dorling Kindersley (India) Pvt. Ltd

I
A
and 
I
B
and make use of these in nodal 
equations.
The admittance of the R
-
L impedance of lines is 1/(0.02
+ 
j0.1) 
=
9.81
∠-
78.7
°
=
1.92
-
j9.62 S. 
The admittance of the parallel R
-
L connection at node C is 0.5
-
j0.5 We write the node equations by 
inspection.
3 84
19 24
1 92
9 62
1 92
9 62
1 92
9 62 3 84
19 24
1
.
.
.
.
.
.
.
.
.
.
.
−
−
+
−
+
−
+
−
−
j
j
j
j
j
992
9 62
1 92
9 62
1 92
9 62 4 34
19 74
1 05 5
+
−
+
−
+
−










∠
j
j
j
j
.
.
.
.
.
.
.
.
°°
∠ °










=










1 4
0
V
I
I
C
A
B
We have used the known voltage phasors at node A and node B. There is no source connected at 
node C and hence there is no current injection at that node from reference node. 
V
C
can be obtained 
by using the third equation, 
(
-
1.92
+ 
j9.62)(1.05
∠
5
°
) 
+ 
(
-
1.92
+ 
j9.62)(1
∠
4
°
)
+ 
(4.34
-
j19.74)
V
C
=
0.
Solving for 
V
C
, we get, 
V
C
=
0.969
+ 
j0.0574 
=
0.971
∠
3.39
°
V rms
Next we find the currents injected by the voltage sources by making use of this value of 
V
C
in the 
first two equations from the matrix nodal equation.
I
A
=
(3.84
-
j19.24) (1.05
∠
5
°
) 
+ 
(
-
1.92
+ 
j9.62) (1
∠
4
°
) 
+ 
(
-
1.92
+ 
j9.62)(0.971
∠
3.39
°
)
I
B
=
(
-
1.92
+ 
j9.62)(1.05
∠
5
°
) 
+ 
(3.84
-
j19.24) (1
∠
4
°
) 
+ 
(
-
1.92
+ 
j9.62) (0.971
∠
3.39
°
)
Therefore, 
I
A
=
0.5037 
-
j0.1580 
=
0.528
∠-
17.42
°
A rms
I
B
=
0.0095 
-
j0.2978 
=
0.298
∠-
88.2
°
A rms
Fig. 7.6-10 
Phasor equivalent circuit 
of a simple power system 
for Example 7.6-6
A
+
–
+
–
B
C
1.05
∠
5°
1
∠
4°

---

Sinusoidal Steady-State Response from Phasor Equivalent Circuit 
7.29
V
A
=
1.05
∠
5
°
and 
I
A
=
0.528
∠-
17.42
°
. Therefore, the phase angle by which the voltage leads 
current is 5
°
– (
-
17.42
°
) 
=
22.42
°
. Therefore, average power delivered by source at node A 
=
1.05 
×
0.528 
×
cos22.42
°
=
0.513 W.
V
B
=
1
∠
4
°
and 
I
B
=
0.298
∠-
88.2
°
. Therefore, the phase angle by which the voltage leads current is 
4
°
– (
-
88.2
°
) 
=
92.2
°
. Therefore average power delivered by source at node A 
=
1
-
×
0.298 
×
cos92.2
°
=
-
0.0114 W. We used P 
=
V
rms
I
rms
cos
q
for these calculations, where 
q
is the phase angle by which 
voltage phasor leads current phasor.
Power delivered to the load at node C 
=
power delivered to 2
Ω
resistor 
+ 
average power delivered to 
2
Ω
reactance 
=
0.971
×
0.971/2 
+ 
0 
=
0.471 W. We used the expression P 
=
V
rms
2
/R for this calculation.
The line currents are found out by dividing the phasor difference between voltage phasors at two 
ends of the line by the line impedance.
Line AC – from A to C 
=
[1.05
∠
5
°
-
0.971
∠
3.39
°
] 
÷
(0.02 
+ 
j0.1) 
=
0.339 
-
j0.204 A rms
Line BC – from B to C 
=
[1
∠
4
°
-
0.971
∠
3.39
°
] 
÷
(0.02 
+ 
j0.1) 
=
0.174 
-
j0.251 A rms
Line AB – from A to B 
=
[1.05
∠
5
°
-
1
∠
4
°
] 
÷
(0.02 
+ 
j0.1) 
=
0.165 
+ 
j0.047 A rms
Verification
The line currents from A to C and from A to B must add up to 
I
A
. The line current from B to C minus 
current from A to B must be 
I
B
. These are verified within numerical rounding errors.
The reader is encouraged to verify the power flow principle in synchronous links brought out in 
Example: 7.6-4 with the results obtained in this example.
example: 7.6-7
The circuit in Fig. 7.6-11 shows a 50 Hz, 230 V 
rms AC voltage source delivering power to a 10
Ω
//
j20
Ω
inductive load through a feeder line of series 
impedance 0.4
+ 
j1 
Ω
. (i) Find the current phasor 
delivered by the source, load voltage phasor, average 
power delivered to load and efficiency of power 
delivery if the capacitor C is disconnected. (ii) Repeat 
part (i) with X
C 
=
-
20 
Ω
. 
Solution
(i) We use voltage division principle to determine load voltage first. The parallel combination of 10
Ω
and j20
Ω
is in series with 0.4
+ 
j1 
Ω
. Therefore, voltage across load, 
V
L
is obtained as
V
L
=
+ +
×
∠ ° =
− +
×
∠ °
=
∠
10
20
0 4
1 10
20
230 0
200
16
218
230 0
0 915
/ /
.
/ /
.
j
j
j
j
j
−−
° ×
∠ °
=
∠ −
°
4 2
230 0
210 2
4 2
.
.
. V rms
Now the current delivered by the source is obtained as
I
=
∠ ° −
∠ −
°
+
=
−
=
∠ −
°
230 0
210 4
4 2
0 4
1
20 2
12 0 23 5
30 8
.
.
.
.
.
.
.
j
j
A rms
.
Fig. 7.6-11 
Phasor equivalent circuit 
for Example 7.6-7
+
–
230
∠
0°V
 
rms
j
1 
Ω
0.4 
Ω
jX
c
C
j
20 
Ω
10 
Ω

---

7.30
The Sinusoidal Steady-State Response
Power delivered to load can be found in two ways. First method is to apply V
rms
I
rms 
cos
q
to the load 
voltage and load current. Load voltage is 210.2
∠-
4.2
°
and load current is 23.5
∠-
30.8
°
. Therefore, 
q
=
-
4.2
°-
(
-
30.8
°
) 
=
26.6
°
and cos
q
=
0.8942. Therefore, average power delivered to load 
=
210.2 
× 
23.5 
× 
0.8942 
=
4418 W.
The second method to find load power is to find the power delivered to the 10
Ω
resistor by applying 
P 
=
V
rms
2
/R. The average power delivered to an inductance is zero. Therefore load power is the same 
as average power in resistor. Therefore, load power is 210.2
2
/10 
=
4418 W.
The average power delivered by source is calculated as 230 
× 
23.5 
× 
cos30.8
°
=
4643 W.
Therefore efficiency of power delivery 
=
100 
× 
4418/4643 
=
95.15%
(ii) With X
C
at 
-
20
Ω
, the reactance of inductor and capacitor in parallel cancel each other as can 
be seen from j
j
j
j
20
20
400
20
20
/ /
.
−
=
−
−
=
open-circuit
Therefore, the load circuit is effectively only 
a resistor of 10
Ω
.
∴
=
+ +
×
∠ ° =
∠ −
°
V
L
10
0 4
1 10
230 0
220 14
5 5
.
.
.
.
j
V rms
Now the current delivered by the source is obtained as
I
=
∠ ° −
∠ −
°
+
=
−
=
∠ −
°
230 0
220 14
5 5
0 4
1
21 9
2 1 22 0
5 5
.
.
.
.
.
.
.
j
j
A rms.
.
The average power delivered to load 
=
220.14
2 
/10 
=
4846 W
The average power delivered by source 
=
230 
× 
22 
× 
cos(
-
5.5
°
) 
=
5037 W
Efficiency of power delivery 
=
100 
× 
4846/5037 
=
96.21%.
We observe that connecting a capacitor across an inductive load results in (i) better load voltage, 
(ii) lower source current, (iii) lower phase difference between source voltage and source current and 
(iv) lower losses in feeder line. Thus there is overall improvement in system performance when the 
capacitor is connected across the inductive load. We had shown in Example: 6.4-5 in Section 6.4 of 
Chapter 6 that when a sinusoidal voltage source is delivering power to load, a given amount of source 
power is transferred to load with minimum losses and maximum efficiency when the load draws 
current from source at zero phase difference at the source terminal. An inductive load draws a lagging 
current. Connecting a capacitor across such a load makes the total current less lagging and closer to 
zero phase condition.
This method of improving the phase between source voltage and source current is called capacitive 
compensation of an inductive load. 
example: 7.6-8
The circuit shown in Fig. 7.6-12 is the small-signal equivalent circuit of a transistor amplifier for 
analysis of operation at high frequency. Find the gain, i.e., ratio of output voltage phasor to input 
voltage phasor at 1 MHz.
+
–
+
–
+
–
50 
Ω
50 
Ω
0.08 
v
x
100 
pF
5 pF 
2k 
Ω
2 k 
Ω
1 k 
Ω
v
s
(
t
)
v
o
(
t
)
v
x
Fig. 7.6-12 
Equivalent circuit of a transistor amplifier at high frequency

---

Sinusoidal Steady-State Response from Phasor Equivalent Circuit 
7.31
Solution
As a first step, we convert the circuit to the left of 100pF capacitor to current source in parallel with 
a resistor by applying Norton’s Theorem in time-domain itself. The resulting Norton’s equivalent and 
the complete circuit with the Norton’s equivalent in place are shown in Fig. 7.6-13.
2 k
Ω
1 k
Ω
50 
Ω
50 
Ω
100 pF
5 pF
89.9 
Ω
89.9 
Ω
2 k
Ω
–
–
–
+
+
+
–
+
v
s
(
t
)
0.01 
v
s
(
t
)
0.08 
v
x
0.01 
v
s
(
t
)
v
o
(
t
)
v
x
v
x
–
+
v
x
Fig. 7.6-13 
Norton’s equivalent of input side of the circuit in Fig. 7.6-12 
Let v
S
(t) 
=
V
m
cos
w
 t V with 
w
=
2
p
× 
10
6
rad/s. The admittance of 5pF and 100pF capacitors are 
calculated as j3.1416
×
10
-
5
s and j6.283
×
10
-
4
s, respectively, at 1 MHz. The conductance of 89.9
Ω
and 2k
Ω
are 0.0111 s and 0.0005 s, respectively. The phasor equivalent circuit constructed using 
these values is shown in Fig. 7.6-14. Two nodes and corresponding node voltage phasors and the 
ground node are also marked.
0.0111
Ω
0.0005
Ω
j
6.283 
10
–4
Ω
j
3.1416 
10
–5
Ω
0.01 
V
m
∠
0°
0.08 
V
x
V
1
V
2
v
o
(
t
)
–
+
–
+
V
x
1
2
R
Fig. 7.6-14 
The phasor equivalent circuit at 1 mhz for the circuit in Fig. 7.6-12 
The node equation at first node is:
( .
.
)
.
.
0 0111
6 6 10
3 1416 10
0 01
0
4
5
+
×
−
×
=
∠
−
−
j
j
V
m